Two-dimensional DCT∕IDCT architecture

Two Dimensional DCT/IDCT Architecture

A new fully parallel architecture for the computation of a two-dimensional (2D) discrete cosine transform (DCT), based on the row-column decomposition is presented. It uses the same one-dimensional (1D) DCT unit for the row and column computations and (N 2 +N) registers to perform the transposition. It possesses features of regularity and modularity, and is thus well suited for VLSI implementat...

Bidirectional, two dimensional regular data flow architecture

Three-dimensional Logic Architecture by Four-terminal Electrical Switches (FES) beyond Two-dimensional CMOS Architecture

We have proposed a new concept of 3D architecture using four-terminal electrical switches (FES), which can replace CMOS logic without self-organized bottom-up process. Ultra high speed FES can be realized by nanoscale electrical mechanical system based on carbon nanotube. Nonvolatile FES can also be realized by modifying twoterminal nonvolatile memory devices, such as solid electrolyte memory u...

On two-dimensional Cayley graphs

A subset W of the vertices of a graph G is a resolving set for G when for each pair of distinct vertices u,v in V (G) there exists w in W such that d(u,w)≠d(v,w). The cardinality of a minimum resolving set for G is the metric dimension of G. This concept has applications in many diverse areas including network discovery, robot navigation, image processing, combinatorial search and optimization....

Reconfigurable Microfluidic System Architecture Based on Two-Dimensional Electrowetting Arrays

We present an architectural design and optimization methodology for performing biochemical reactions using two-dimensional electrowetting arrays. We define a set of basic microfluidic operations and leverage electronic design automation principles for system partitioning, resource allocation, and operation scheduling. Fluidic operations are carried out by properly configuring a set of grid poin...